The technology described in this patent document relates to metal-oxide semiconductor field-effect transistor (MOSFET) devices, and more specifically to MOSFET devices having a gate structure formed using a replacement gate process, as well as to methods to fabricate such devices.
Scaling of semiconductor devices, such as a MOSFET, has enabled continued improvement in speed, performance, density, and cost per unit function of integrated circuits over the past few decades. Improvements to the process for creating a metal gate can further the scaling of integrated circuits.
A MOSFET can be fabricated on a bulk semiconductor substrate (planar devices) or on a silicon-on-insulator (SOI) type of structure. In a replacement gate process a dummy gate structure can be formed from, for example, polysilicon (poly). After source-drain (S/D) processing is initiated or continued, the dummy gate structure is removed and replaced by an electrically conductive metal-containing gate stack that overlies a channel region between the S/D in the bulk semiconductor substrate or in the silicon layer of the SOI structure.